93970 - Design & Verification Engineer Leder- Semiconductor (LSI)

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☞ RGF HR Agent Vietnam Co., LTD

视图: 155

更新日: 14-04-2024

位置: Ho Chi Minh

类别: 电气/电子

水平: Trưởng nhóm / Giám sát

薪水: 36 Tr - 77 Tr VND

水平: Cao đẳng

经验: 2 - 3 Năm

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职位描述

Responsibility

With the specifications required by the customer as INPUT
Carry out specific design verification work using the following languages

**OUTPUT
Functional specifications (English)
Implementation specifications (English)
RTL (Verilog / SystemVerilog)
Verification strategy (English)
Verification item table (English)
Verification environment construction / verification scenario (System Verilog / SVA / UVM / C)
Verification environment manual (English)
Verification result report (English)
- Other tasks assigned by the manager

- Working location: District 3, Ho Chi Minh City
- Monthly Salary: 36M～77M (VND)

工作要求

Necessary Skill / Experience
- Age: Any
- Gender: Any
- More than 3 years experience as Engineer Leader in the semiconductor industry, having skills as below;
*Front-end design and verification of ASIC
*RTL design by Verilog HDL/VHDL
*Design and verification using a general-purpose bus AMBA(AXI/AHB/APB)
*Assertion-Based Verification
- Technician who can do tasks by himself/herself
Preferable Skill / Experience
- English skill : Business level(overseas business trip, meeting with overseas engineers)
- Technical skills as below
Design and verification of ASIC built-in CPU
Design and verification of high-speed interfaces such as PCI Express and USB
Random verification using SystemVerilog
Testbench building that applied verification methodology(UVM)

NOTICE:
Only shortlisted candidates will be approached by RGFs consultant. Your resumes will be recorded in our system, and you will receive our Job Introduction Auto-email with suitable jobs in the coming time. Please check your email regularly to get our vacant job. Thanks so much!

工作兴趣

  • Chế độ bảo hiểm
  • Du Lịch
  • Chế độ thưởng
  • Chăm sóc sức khỏe
  • Đào tạo
  • Tăng lương
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最后期限: 14-05-2024

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